A silicon chip, or Integrated Circuit (IC), is the core element of an electronic device and usually comes in packaged form. With the development of manufacturing technology and requirement of compact design for end products, various packaging methods were invented to meet the demand. Generally, silicon chips are sealed within a protective material such as a molding compound. There are certain cases, particularly when the silicon chip is a sensor device such as a fingerprint sensor chip embedded in a cellular phone or smart card, that the silicon chip needs to be mount on a substrate and has a surface exposed. Meanwhile, for a fingerprint reader device, the thickness of the packaged sensor must be reduced, and the surface should be maintained flat whenever possible. Several techniques, such as wire bonding, flip chip, and other non-conventional packaging methods, are used to package a fingerprint sensing chip now. However, none of them meets all the requirements: flatness of the top surface, thickness of the package, rigidness between the fingerprint sensing chip and the package material, and good circuit connectivity.
Conventional wire bonding is sometimes used to address the above requirements. Please refer to FIG. 1. A chip 1 in form of a die is mounted on a Printed Circuit Board (PCB) 2. There are many bonding pads 3 on one surface of the chip 1. Some connectors 4 are arranged on the PCB 2. By wire bonding, gold or aluminum wires 5 are formed to link the related bonding pads 3 and the connectors 4. In order to fix the chip 1 to the PCB 2, a layer of adhesive (not shown) may be applied on the interface between the chip 1 and the PCB 2. In general, the height of the gold wires 5 over the PCB 2 will occupy certain space above the chip surface. Moreover, when the chip 1 and the wires 5 are sealed in molding compound to protect the circuit while maintaining a flat surface, the molding compound above the chip must be thicker than the height of the bonding wires 5. The extra sealing material above the sensing surface will cause significant performance degrade. For the electronic devices whose thickness and surface flatness are much concerned, apparently, the wire bonding for the chip 1 and the PCB 2 is not appropriate.
Flip chip technology is another widely used packaging method for interconnecting between a die and a PCB. Processing a flip chip is similar to the conventional IC fabrication, with a few additional steps. Please refer to FIG. 2. Around the end of the manufacturing process, the attachment pads 12 of a chip 11 are metalized to make them more receptive to solders. It typically consists of several treatments. Small dots of solder balls 13 are then deposited on each metalized pad 12. The chips 11 are then cut out of a wafer as normal. To attach the flipped chips 11 onto a PCB 14, the chip (die) 11 is inverted to bring the solder balls 13 down onto connectors 15 on the underlying PCB 14. The solder balls 13 are then re-melted to produce an electrical connection, typically using a thermosonic bonding or alternatively using a reflow solder process. This also leaves a small space between the chip's circuitry and the underlying mounting surface. In most cases, an electrically-insulating adhesive 16 is then underfilled to provide a stronger mechanical connection. However, to provide good circuit connectivity and rigidness, the size of the solder balls 13 cannot be reduced. Moreover, the difference in height between the top surface of the chip 11 and that of the underlying PCB 14 cannot be removed when the flip chip technology is applied. Therefore, the flip chip technology is not a proper packaging method for thickness and surface flatness is concerned.
U.S. Pat. No. 7,090,139 of Kasuga et al. discloses a smart card including a fingerprint sensor attached to a thin wiring film, and having a window or opening above the sensing surface to expose the sensing surface. The fingerprint sensor is sandwiched by two substrates, and the electrical connection between the sensor and the wiring film is achieved by anisotropic conductive films. Certainly, an obvious step, caused by the height of the substrate above the sensor and the height of the anisotropic conductive film, exists between the top surface of the smart card and that of the sensor. Thus, even though the smart card packaging method provided by Kasuga et al. meets the thickness requirement of a smart card, a flat top surface cannot be achieved.
A packaging of a fingerprint sensor and a method thereof, such as disclosed by U.S. Pat. No. 8,736,001, is shown in FIG. 3. The finger sensor 30 includes a substrate 35, a finger sensing IC 34 mounted on the substrate 35, and bond wires 32 coupling the substrate 35 and the finger sensing IC 34. The finger sensing IC 34 includes a finger sensing area on an upper surface thereof. The finger sensor 30 includes an encapsulating layer 33 encapsulating the finger sensing IC 34 and covering the finger sensing area. The encapsulating layer 33 includes a recessed portion 37 for receiving the finger of the user. The encapsulating layer 33 also includes a peripheral flange portion 38 on the substrate 35 and surrounding the finger sensing IC 34 and the bond wires 32. The finger sensor 30 includes a bezel 31 on the encapsulating layer 33. The bezel 31 may be coupled to circuitry to serve as a drive electrode for driving the finger of the user. The finger sensor 30 includes conductive traces 36 on the substrate 35 for coupling the bezel 31 thereto. The bezel 31 may comprise a metal or another conductive material. In some examples, ESD protection circuitry may be coupled to the bezel 31. That the bezel 31 is affixed on an uppermost surface of the encapsulating material (at the level higher than that of the highest point of the bond wire) means that a step between the surface of the sensing area and top surface of the bezel is subject to the loop height of the bond wire, which is around 100 μm in normal cases. Thus, the usage of the bezel 31 may protect the finger sensing IC 34 from mechanical and/or electrical damages, the bezel 31 is not suitable for the products that are needed to be flat and/or thin, such as a smart card or a smart phone.
Also, U.S. Pat. No. 8,933,781 of Desnoyers et al. discloses additional electrically conducting surface parts positioned adjacently to the sensitive surface of the sensor in a smart card to enhance the signal received by the fingerprint sensor. No particular method of the connection between the sensor and the circuit in the smart card mentioned implies some conventional linkage method is used. Using conventional linkage method and the lack of emphasis on the flatness of the packaging implies that not only the flatness of the top surface but a thicker protective coating layer for ESD is the purpose of '781.
Both the bezel mentioned in U.S. Pat. No. 8,736,001 and the electrically conducting surface mentioned in U.S. Pat. No. 8,933,781 are exposed to environment. Although the bezel combines the driving electrode with ESD protective circuitry, it is still an exposed element. There are two disadvantages. First, size of the human body makes an antenna like device that can pick up radiation signals which may interfere with the fingerprint sensing function. Secondly, from the industrial design point of view, exposed conductive material, such as a reflective metal surface, may not be the choice of the designer, i.e. the designer may want to choose any suitable color or grain.
Furthermore, U.S. Pat. No. 8,736,080 of Arnold et al. discloses a low profile integrated circuit assembly which comprises: an integrated circuit, a substrate where the integrated circuit is disposed on, a conductive layer disposed in the signal trench and coupling to an integrated circuit signal pad, a bond wire configured to couple the conductive layer to an external pad. The substrate comprises at least one signal trench which is proximate to the integrated circuit signal pad and extending to one edge of the substrate. The bond wire, the at least one signal trench and the conductive layer are formed below a surface plane of the integrated circuit. This method successfully reduces the height of the package, and further provides a flat top surface. This method may provide an Integrated Circuit assembly having a flat top surface. However, the manufacturing processes, involving a deep etching step to form the trench and an additional metal plating step to form the conductive layer, require more manufacture time and additional cost.
Therefore, a low-cost and improved PCBA structure with a flat top surface, an embedded signal transmitting part(s), and a chip, especially a fingerprint sensor chip, mounted on a PCB over an opening is still desired. More particularly, both the embedded signal transmitting part(s) and the chip are sealed under a single protection layer which forms a flat top surface.